Jobs · Full-time · Mid

FPGA / DSP Engineer

Turn wideband RF samples into useful data on board — FPGA and DSP for LSF's software-defined radio payloads.

Full-time Mid Payload
Location
Athens HQ · on site
Posted
2026-10-15

The work

Our payloads sample tens of megahertz of spectrum, but a satellite can send only a small fraction of that to the ground. This role builds the processing that decides what is worth sending.

A typical month mixes:

  • Signal processing on the FPGA. Channelisation, detection, parameter estimation and data reduction on Zynq-class SoCs with AD9361 transceivers.
  • Timing. Precise time-stamping and synchronisation with GNSS-disciplined references.
  • Hardware/software co-design. Splitting the work between fabric and processor with the embedded software team.
  • Verification. Test benches, simulation against recorded signals, and hardware-in-the-loop tests on our flatsat.

What we’re looking for

  • 2–5 years of FPGA work (VHDL or Verilog, Vivado) and digital signal processing.
  • Software-defined radio experience is a plus: AD9361, GNU Radio, or our own SatNOGS-COMMS.
  • Python or MATLAB for prototyping algorithms before they go into the fabric.
  • Fluent English. Greek is a plus.

How we work

LSF is a self-managing, open-source non-profit. We make decisions in the open, prefer durable docs over standing meetings, and review each other’s work on GitLab. This role is on site at our Athens HQ (Irous 21, 104 42 Athens), next to the cleanroom and lab where our flight hardware is integrated and tested. We aim for a start between December 2026 and February 2027.

We weigh fit with the foundation and its mission at least as heavily as fit with the position. Read more in our hiring documentation.

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